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العنوان
Field Programmable Gate Array (FPGA) - Based Implementation of Iris Recognition Systems /
المؤلف
Gadel-Haq, Ramadan Mohamed Abdel-Azim.
هيئة الاعداد
باحث / Ramadan Mohamed Abdel-Azim Gadel-Haq
مشرف / Nawal Ahmed El-Fishawy
مناقش / Nawal Ahmed El-Fishawy
مناقش / hesham arafat
الموضوع
Programmable array logic. Field programmable gate arrays.
تاريخ النشر
2013 .
عدد الصفحات
149 p. :
اللغة
الإنجليزية
الدرجة
ماجستير
التخصص
الهندسة الكهربائية والالكترونية
تاريخ الإجازة
16/1/2013
مكان الإجازة
جامعة المنوفية - كلية الهندسة الإلكترونية - Department of Computer Science and Engineering.
الفهرس
Only 14 pages are availabe for public view

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Abstract

Iris is touch-less automated real-time biometric system for user authentication. Pattern recognition approaches suffer from high cost, long development times, and computationally intensive. General Purpose Systems are low speed and not portable ; FPGA-based system prototype implemented by using VHDL language. Iris recognition system is, implemented in software. To overcome the
problems of obtaining a real-time decision of the human iris in an accurate,
robust, low complexity, reliable, and fast technique. Threshold concepts are
used to segment the pupil. Canny edge detector and Circular Hough Transform
are used to localize the iris region. Rubber Sheet Model is used as an
unwrapping and normalization algorithm. Histogram equalization technique is
used to enhance the normalized iris image contrast. Iris features are extracted
and encoded using 1D log-Gabor transform and the DCT respectively. Finally,
the template matching is performed using the Hamming distance operator.
Experimental tests on the CASIA (version 1) database achieved
98.94708% of recognition accuracy using 1D Log-Gabor with Equal Error Rate
(EER) equal to 0.869%. The FAR and FRR are 0% and 1.052923%
respectively. In contrast, 93.07287% of accuracy using DCT with EER equal to
4.485%. The FAR and FRR are 0.886672% and 6.040454%, respectively. The
proposed approach (FDCT-based feature extraction and Hamming Distance
stages) are implemented and synthesized using Xillinx FPGA chip
(XC3S1200E-4fg320), occupying 1% of chip CLBs. It achieved 58.88 μs to
process and takes a decision compared with current software implemented
taking 1.926794 s.
A 1D log-Gabor iris recognition system is more accurate and secure.
However, DCT-based one is more reliable, having a low computational cost
and a good interclass separation in a minimum time. The hardware
implementation is small and fast enough.