الفهرس 
IntroductionOnly 14 pages are availabe for public view
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Abstract
Increase the complexity of the circuit and raise the level of performance and demand high standards of quality that is causing the industry to Questions currently used specification-based software testing and functional. In addition, the rising cost of production test equipment capable of measuring high-performance device parameters in many cases become a limiting factor. Pseudorandom test can be valuable for digital circuits, because it does not require any effort in test generation. It can also test methodology fake easily applied to any class of paintings under study. Pseudorandom test was used in the proposed system we have. In the Council’s proposed system under test (but) and the test patterns are simulated for error-free circuit and all the faults of signatures as possible. All signatures are stored in a database created on a chip FPGA. Also contains on-chip test system. Tasting system generates random pattern, which was referred to, however, will be compressed response received using multiple input shift recording (Egypt) to create a signature for each test case. Signatures are compared and was born with a database has been created. And tracking results on the LCD. In this thesis, a single-chip (FPGA) was used for the implementation of automatic test equipment (eat), the system has been implemented and tested successfully. Been use Flex10k EPF10K20RC240 chip Read in implementation. The thesis is organized as follows: Introduction and review to the main approach to the test, and test and digital private. Design for testability and types. Background FPGA. Describes the proposed system. Explains in detail as a result of the proposed system simulation with ISCAS 89 benchmark circuits. Experimental result of the proposed system. Concluding remarks and proposals for an expanded work.