الفهرس 
Design exploration for network on chip based FPGAs
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Abstract
This thesis explores how to adapt and use Networks-on-Chips for designing the next-generation FPGAs, a literature survey of existing Networks-on-Chip designs is presented. A comparative review between three NoC routers is provided it shows that increasing number of router ports affects the area, power and frequency of the network significantly. For that, the Codec is introduced to connect more tiles or modules to the network. A comparison is held between two 2D networks, with and without Codec. Finally, the effects of adding Codec to 3D-NoCs are investigated