الفهرس 
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Abstract
In this work, nano-crystallite CdSe thin films were deposited by thermal evaporation technique from CdSe nano-powders on glass substrates. The structural features of the deposited films have been characterized by using optical transmission measurements, The X-ray diffraction (XRD) and field emission scanning electron microscopy (FESEM). The X-ray line profile analysis revealed that the CdSe films are nano-crystallite and have a wurtzite (hexagonal) structure. These nano-crsytallite CdSe films are preferentially oriented along the (002) plane with a c-axis perpendicular to the substrate surface. The crystallite size for these films lies in the range 16 - 36 nm as measured from X-ray line broadening. It has been found that the variation of film thickness has a great influence on the microstructural parameters, such as micro-strain, the stacking-fault probabilities, dislocation densities as well as the crystallite size. In this respect, the micro-strain, dislocation density and stacking fault probabilities demonstrate a decrease by increasing the film thickness. The refractive indices (n) and absorption coefficients ( of the investigated films were obtained from transmission spectra. Here, the Sellmeier dispersion relationship quite agrees with the estimated values of n over a spectral range of 200 nm to 2500 nm. Various optical parameters of the investigated nano-crystallite CdSe films have been interpreted in the frame of Wemple-DiDomenico single oscillator model. Such evaluated parameters provide valuable physical insights; such as, the relationship between the ionicity of the CdSe films and microstructural parameters.
Furthermore, the temperature dependent electrical properties of Au Schottky contacts to a-plane CdSe thin films growing on p-Si (001) that investigated over the temperature range of 160–360 K, showed a rectification behavior. Nevertheless, the magnitude of the peak broadening (c) of the films grown on p-Si (100) substrates is narrower than that of the films grown on glass substrates; this is, due to a 21% lattice mismatch between CdSe and Si substrate. The respective barrier height (φb) and ideality factor (ṉ) values were found to be 0.863 eV at 360 K to 0.451 eV at 160 K, and 2.48 ± 0.11 at 360 K to 5.18 ± 0.19 at 160 K. The increasing of φb while decreasing ṉ with the increase of temperature has been described by a double Gaussian distribution with two different temperature regions: 240–360 and 160–240 K. Also, it was observed that the Au/CdSe/ Si/Al heterostructure exhibits space charge limited current (SCLC) at all temperatures investigated. The transition voltage (Vx) from ohmic to SCLC, is found to be quite dependent on temperature. The defect levels were estimated from the slope of ln J versus 1/T plots, that yield two values of activation energies Ed1 = 0.227 ± 0.011 eV in the 240–360 K range and Ed2 = 0.128 ± 0.003 eV in the 160–240 K range. Moreover, the characteristic parameters of the considered Ni/CdSe/p-Si/Al structure, demonstrates a deviation from the pure thermionic emission–diffusion theory. In conclusion, the increase of series resistance Rs as the temperature decreases, is believed to be resulted due to an amorphous layer between CdSe/Si that responsible for increasing n and/or lack of free-charge carriers at low temperatures.