الفهرس 
Biomedical Applications
Literature ReviewOnly 14 pages are availabe for public view
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Abstract
The use of wireless communications for biomedical applications has recently drawn a significant research attention; as it helps patients experience better physical mobility while not being obliged to stay in hospital. Three types of communication channels for health care applications, that include off-body, on-body and in-body channels, help to minimize clinical checks and hospitalization costs. Since human body safety is of main concern, along with the functionality, reliability and long term operation of health care applications, several requirements are set that include low radiated power, and low power consumption.
60 GHz communications offer several advantages that include reduced coverage range, highly directional antennas, and small sized equipment on body; thus, it is the most suitable frequency for use in biomedical applications communications. Wireless electro-cardiac body area sensor network is a biomedical transceiver that includes wireless electrodes that are placed across the human body and a base station that communicates with the electrodes using 60 GHz OOK signals, and the external world using GSM network.
This thesis targets the design of low power 60 GHz front-end receiver for on-body biomedical applications. The main focus is on the design of low noise and power architectures for the main building blocks of the front-end receiver, which is designed using CMOS technology.
A state of the art front-end OOK receiver is proposed which is implemented based on heterodyne structure to achieve good sensitivity of -80 dBm. The receiver utilizes a proposed low noise figure and low power 60 GHz differential low noise amplifier architecture that comprises an inductive-capacitive cross coupled common-gate stage. Qualitative and quantitative analyses are provided with an optimum design methodology. In addition, a comparison with the conventional cross-coupled LNA is provided.
Taking into consideration, the recently achieved 60 GHz maximum transmitted power, gains of antennas, and communication range, the overall specifications of the system are determined using link budget equations. These specifications include sensitivity, channel bandwidth, noise figure, and third order intercept point. Then, the specifications of each building block are calculated using the power coefficient of each block.
The system is implemented using UMC 65 nm bulk CMOS technology and utilizes area of 1.06 mm2. At millimetre wave frequencies, modelling of all used capacitors, inductors, and routing lines is carried out using electromagnetic simulator, SONNET. Post-layout simulations are presented, which show that the overall 60 GHz receiver achieved return loss better than -10 dB, noise figure of 5.6 dB, signal to noise ratio of 14.6 dB, bit error rate of 5.5 x 10-7, power consumption of 25.6 mW, and third order intercept point of -33 dBm.