الفهرس 
English AbstractOnly 14 pages are availabe for public view
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Abstract
This thesis presents a study about different modeling techniques (master equation and Macromodeling algorithm) for single electron systems. These techniques could model the most used single electron device (single electron transistor (SET)). By applying these techniques, one can find that master equation gives better accuracy than Monte Carlo algorithm and takes less simulation time. A new proposed PSPICE fast model for the SET is presented. It is based on the “orthodox theory” of single electron tunneling, valid for unlimited range of drain to source voltage, valid for single or multi gate SET and symmetric or asymmetric SET. It is implemented using PSPICE to enable simulation with other electronic components like MOS devices. Some single electron circuits are studied and simulated using our proposed model. These circuits are single electron inverter, five inverters in series and amplifier circuit. The effect of the number of states on the run time, current, negative resistance and the temperature were studied. Finally, this thesis presents a design and simulation of hybrid SET/MOS Analog-to-Digital and Digital-to-Analog circuits. The hybrid n-bit DAC nano-circuits are simulated (for n=4 and 8) using Orcad Capture PSPICE. The performance of the SET/MOS hybrid n-bit ADC circuits were simulated (for n=3 and 8). Also ADC circuits using Single Electron Transistor were simulated (for n=8) using Orcad Capture PSPICE. The results shows that the transient operation of hybrid SET/MOS circuit-based DAC could successfully operate at 1000K while ADC could operate at 144K. This performance can be compared with the pure SET circuits, the proposed converter circuits have been enhanced in the drive capability and the power dissipation. Compared with the other SET/MOS hybrid circuit, the implemented converter circuits have low simulation time, high speed, high load drivability and low power dissipation.