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Abstract In this thesis, a Delta-Sigma Fractional-N frequency synthesizer using a phase selection approach is designed. This approach aims at decreasing fractional spurs that appear when using fractional-N frequency synthesizers. The phase selection approach is a method to carry out fractional division by toggling between different fractional division ratios. The average of these fractional division ratios is equal to the required fractional division ratio. Eight signals, shifted in phase by π/4, are generated from the output of the frequency synthesizer using a phase generator. Each reference cycle, a fractional division ratio is achieved by selecting one of the eight signals. A MASH 1-1-1 Delta-Sigma modulator is used to control the phase selection process. The difference between two successive fractional division ratios at two successive reference cycles corresponds to the difference between two successive output values of the Delta-Sigma modulator at the same reference cycles. This approach was designed using 130nm TSMC design kit and a supply voltage of 1.5 volts. It was able to achieve better results than those of the conventional fractional-N frequency synthesizers regarding phase noise and fractional spurs. |