الفهرس 
chapter 1Only 14 pages are availabe for public view
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Abstract
DRAM chip industry became one of the most researcher’s intereats nowadays for its simple structure and low power consumption. as the density of DRAM chips increase, many problems occurred that affected the DRAM performance values. these large value slow down the reading operation of the cell and increse the consumed power. this problem gave a great attention to improve the performance of the sense amplifier circuit that is used in the reading operation in the DRAM cell for its great effect on both DRAM access times and overall power consumption.
in this thesis, we introduce alternative circuit architechtures for the CMOS sense amplifier which we introduce alternative circuit architectures for the CMOS sense amplifier which are specially designed logic buffers using a resonant tunneling diode (RTD) that can be faricated in silicon nanoelectronics.