الفهرس 
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Abstract
Optical communication represents the recent technology that can be used to process large amounts of data and transmit them. Optical logic gates are considered as key elements in optical processing and communication systems which make the important functions at the nodes of network such as data encoding and decoding, pattern matching, recognition and various switching operations. Most of the recent research work based in different schemes that have been demonstrated to realize various all-optical logic gates such as quantum dots, semiconductor optical amplifiers (SOAs), multimode interference in SiGe/Si and nonlinear SOI waveguide. Most of these works suffer from certain limitations such as big size, difficult to perform chip scale integration, high power consumption, low speed and the spontaneous emission noise.Photonic crystals (PhCs) are periodic dielectric structures which formed naturally or artificially. They are also called photonic band-gap where photons with in certain frequency range. There are many numerical techniques used to investigate the characteristics of the PhCs structures such as finite difference time domain (FDTD) method and finite element method (FEM). Now PhCs are visualized as an important of the future of photonic device Logic gates for light signals are considered as the key to the optical data used for receiving inputs and transferring it to one output. It is constructed from combinations of blocks that realizing the functions of logic gates such as “AND, “OR, and “NOT” and other gates. This output represents logic 1 or 0. PhCs devices are applicable to optical logic gates because of their compact size, high speed and v In this thesis, we propose and simulate two compact novel designs for AND and OR optical logic gates based on 2D PhCs platform. Each structure proposed for the realization of OR or AND logic gates is composed of two line defects, ring cavities and Y-branch waveguide. Here, the procedure for designing complete structure is based on designing and optimizing its half first. The calculations in this thesis were performed using numerical simulations package using finite difference time domain method. The suggested design for AND gate have contrast ratio of around 6 dB and the suggested design for OR gate offers transmitted power of not less than 0.5. On top of that, the proposed OR and AND logic gates can operate at bit rates of around 0.5 Tbits/s and 0.208 Tbits/s, respectively. Further, the calculated fabrication