الفهرس 
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Abstract
Image compression is one of the most important topics in the field of digital image processing. Inventing efficient techniques for compressing digital images is one of the challenges in this era of multimedia. JPEG2000 is considered as a new image compression standard that offers the requirements needed nowadays. It is an efficient technique that compresses both images and videos with high compression ratios while keeping a high image quality and offering some interesting features needed by most of the applications nowadays.
As the JPEG2000 standard is considered as a complex technique, compared to other present image compression standards, efficient hardware implementation of this standard is a considerable challenge. Hardware implementation of JPEG2000 encoder is an important issue in order to embed the compression engine inside the imaging devices, so as to apply compression directly on raw images before storage. MQ encoder is one of the main and important modules in the JPEG2000 encoder.
In this thesis, a hardware implementation of the MQ encoder, that was targeted to be implemented on FPGA, is presented. The thesis covers all the important aspects of the JPEG2000 standard, including its origin, its important features and showing its different parts and components in details.